Tabs for Contents, notes, highlights

Contents
Notes
Highlights

Detailed Table of Contents

Hide Contents, Notes, and Highlights

Search TermsShow Hide

« Back to eTextbook

Copyright, ii
Preface, xiii
1. Introduction to the HC12 and the S12 Microcontrollers, 1
1.1. Brief History of Computers, 2
1.2. Computers and Embedded Controllers, 4
1.3. Applications of Embedded Controllers, 7
1.4. Overview of the HC12, 9
1.4.1. Software Instruction Set, 9
1.4.2. Hardware, 10
1.5. Overview of the S12, 12
1.5.1. Software Instruction Set, 13
1.5.2. Hardware, 13
1.6. Summary, 14
1.7. Further Reading, 14
2. HC12 and S12 Assembly Language Programming, 16
2.1. Programmer’s Model, 17
2.2. HC12/S12 Assembly Language, 21
2.3. Instruction Execution Cycle, 22
2.4. Instruction Set, 25
2.4.1. Data Transfer and Manipulation Instructions, 28
2.4.2. Arithmetic Operations, 32
2.4.3. Logical and Bit Operations, 38
2.4.4. Data Test Instructions, 45
2.4.5. Optional: Fuzzy Logic Instructions, 47
2.5. Addressing Modes, 49
2.5.1. Inherent Addressing Mode, 49
2.5.2. Immediate Addressing Mode, 50
2.5.3. Direct Addressing Mode, 50
2.5.4. Extended Addressing Mode, 51
2.5.5. Index Addressing Mode, 51
2.5.6. Relative Addressing Mode, 54
2.6. Branch Instructions, 55
2.7. Directives (Pseudo-Op-Code) and a Good Programming Approach, 60
2.7.1. Directives, 60
2.7.2. A Good Programming Approach, 62
2.8. Laboratory Applications, 62
2.9. Summary, 69
2.10. Chapter Problems, 70
3. Advanced Assembly Programming, 73
3.1. Assembly Process, 74
3.2. Loops, 77
3.3. Stack, 79
3.3.1. Definition of Stack, 79
3.3.2. Use of a Stack, 81
3.3.3. Access to a Stack, 82
3.4. Subroutines, 84
3.4.1. Subroutine Calls and Returns, 85
3.4.2. Parameter-Passing Techniques, 87
3.5. HC12 and S12 D-Bug12 Utility Subroutines, 93
3.6. Programming Modules, 100
3.6.1. Good Programming Techniques, 101
3.7. Applications: Robot Navigation using HC12/S12, 105
3.8. Laboratory Applications, 110
3.9. Summary, 114
3.10. Further Reading, 115
3.11. Chapter Problems, 115
4. Fuzzy Logic, 118
4.1. Conventional Controller versus Fuzzy Logic Controller, 119
4.2. Fuzzy Logic Controller for a Balancing Robot, 122
4.2.1. Background, 122
4.2.2. Optional: Dynamic Model for the Robot, 123
4.2.3. Fuzzy Logic Controller, 126
4.3. The HC12 and S12 Fuzzy Logic Operations, 131
4.3.1. Membership Function Design Process, 135
4.3.2. Fuzzy Rule Implementation, 137
4.3.3. HC12 and S12 Fuzzification Process, 138
4.3.4. Unweighted Rule Evaluation (REV) and Weighted Rule Evaluation (REVW), 140
4.3.5. HC12 and S12 Defuzzification Process, 145
4.3.6. Other Fuzzy Logic Controller-Related Instructions, 146
4.4. Application, 147
4.5. Some Comments on Fuzzy Logic Controller Design, 154
4.6. Laboratory Application, 156
4.7. Summary, 160
4.8. Further Reading, 161
4.9. Chapter Problems, 161
5. HC12 and S12 Hardware Configuration, 163
5.1. The Maze Navigating Robot, 164
5.2. The Hardware System, 167
5.3. The S12 Hardware System, 170
5.4. Modes of Operation, 175
5.4.1. Normal Operating Modes, 175
5.5. Hardware Pin Assignments, 176
5.6. Microcontroller Subsystems, 177
5.6.1. HC12 Register Block, 177
5.6.2. S12 Register Block, 179
5.6.3. HC12 Port System, 180
5.6.4. S12 Port System, 182
5.6.5. A Few More Details on Ports, 184
5.6.6. The Timing System—The Standard Timer Module, 184
5.6.7. The HC12 Memory System, 186
5.6.8. S12 Memory System, 188
5.6.9. HC12 Interrupts, 189
5.6.10. S12 Interrupts, 191
5.6.11. Clock Functions, 192
5.6.12. Serial Communications—The Multiple Serial Interface, 193
5.6.13. The Data Conversion System—The Analog-to-Digital Converter, 195
5.7. Application—Switches, Keypads, Indicators, 195
5.7.1. Electrical Compatibility, 196
5.7.2. Input Switch, 200
5.7.3. Switch Bank, 202
5.7.4. Keypads, 202
5.7.5. Indicators—Light Emitting Diodes, 203
5.7.6. Indicators—Seven-Segment Displays, 205
5.7.7. Programming Switches and Indicators, 206
5.7.8. Interfacing High Power DC and AC Devices, 207
5.7.9. Optical Isolation, 209
5.7.10. H-bridge, 209
5.8. Application—Wall Following Robot, 211
5.9. Laboratory Application, 211
5.10. Further Reading, 212
5.11. Summary, 213
5.12. Chapter Problems, 213
6. Exceptions—Resets and Interrupts, 217
6.1. Overview, 218
6.2. What Is an Interrupt?, 221
6.3. General Interrupt Response, 222
6.4. Reset and Exception Systems Aboard the HC12 and S12, 224
6.4.1. Resets, 225
6.4.2. Interrupts, 229
6.4.3. Exception Vector, 233
6.4.4. Exception Priority, 236
6.4.5. HC12 Interrupt System-Associated Registers, 237
6.4.6. S12 Interrupt System-Associated Registers, 238
6.4.7. Interrupt Priority Decoder, 238
6.5. How Do the HC12 and S12 Respond to an Interrupt?, 238
6.6. Writing Interrupt Service Routines, 243
6.6.1. ISRs with the 68HC812A4 EVB RAM—SetUserVector Technique, 243
6.6.2. The S12 RAM based ISR—Set User Vector Technique, 246
6.6.3. How to Program an HC12 or S12 ISR—An Example for Flash EEPROM, 246
6.6.4. Programming the HC12 Real-Time Interrupt (RTI) System, 250
6.6.5. The S12 Real-Time Interrupt (RTI) System, 254
6.6.6. Another RAM Based Method of Initializing the Interrupt Vector Table, 256
6.7. A Few More Details, 259
6.8. Advanced Interrupt Topics, 259
6.9. Laboratory Application, 260
6.10. Summary, 264
6.11. Further Reading, 264
6.12. Chapter Problems, 264
7. The HC12 and S12 Clock and Timer Systems, 267
7.1. Overview, 268
7.2. The HC12 Clock Module, 269
7.3. S12 Clock and Reset generator, 271
7.4. Clock Divider Chain Serving the Timer Module, 272
7.5. The Timer Module, 273
7.6. Components of the Timer Module, 276
7.6.1. Free-Running Counter, 276
7.6.2. Free-Running Counter-Associated Registers, 282
7.6.3. Input Capture/Output Compare Channels, 285
7.6.4. The Pulse Accumulator, 297
7.7. Programming the Input Capture, Output Compare, and the Pulse Accumulator Features of the TIM and ECT, 301
7.7.1. Programming the Input Capture System, 302
7.7.2. Programming the Input Capture System with an Interrupt, 304
7.7.3. Programming the Output Compare System, 304
7.7.4. Programming the Output Compare System with Interrupts, 306
7.7.5. Programming the HC12 and S12 Pulse Accumulator System, 308
7.8. The Real-Time Interrupt (RTI), 309
7.8.1. HC12 Real-Time Interrupt, 309
7.8.2. The S12 Real-Time Interrupt (RTI) System, 310
7.9. The Pulse Width Modulation (PWM) System, 310
7.9.1. HC12 PWM Fundamentals and Features, 313
7.9.2. HC12 PWM Channel Alignment, 315
7.9.3. HC12 PWM Clock System, 316
7.9.4. HC12 PWM Registers, 317
7.9.5. The S12 Pulse Width Modulation System, 323
7.9.6. Programming the HC12 PWM, 323
7.10. The Enhanced Capture Timer, 330
7.10.1. S12 Timer Related Registers, 330
7.10.2. Enhanced Capabilities of the ECT System Overview, 330
7.10.3. Non-Buffered Input Capture Channels, 330
7.10.4. Buffered Input Capture Channels, 331
7.10.5. ECT-Related Registers, 334
7.11. Laboratory Applications, 337
7.12. Summary, 356
7.13. Further Reading, 357
7.14. Chapter Problems, 357
8. The HC12 and S12 Memory Systems, 361
8.1. Overview, 362
8.2. Background Theory, 362
8.2.1. HC12 Memory Variants, 363
8.2.2. S12 Memory Variants, 363
8.3. Basic Memory Concepts, 363
8.3.1. Memory Capacity and Control Signals, 363
8.3.2. Memory Buses, 365
8.3.3. Memory Technologies: ROM versus RAM, 367
8.3.4. Memory Map, 369
8.4. Linear Memory Expansion—A Case Study, 373
8.4.1. Memory Layout Design, 375
8.4.2. Microcontroller and Memory Chip Control Signal Connections, 380
8.4.3. Timing Analysis of Basic Memory Operations, 383
8.4.4. Electrical Compatibility, 398
8.5. Memory Paging, 398
8.5.1. Memory Paging Case Study, 400
8.5.2. HC12 Memory Expansion Registers, 403
8.6. Programming Flash and Paged Memory, 409
8.7. Applications, 409
8.8. Case Study: AND671GST LCD Character Display Interface, 411
8.8.1. Hardware Interface, 411
8.8.2. Timing Interface, 411
8.8.3. Software Interface, 413
8.9. Further Reading, 413
8.10. Summary, 415
8.11. Chapter Problems, 415
9. Analog-To-Digital (ATD) Converter, 417
9.1. Overview, 418
9.2. Transducer Interface Design, 420
9.3. Analog-to-Digital Conversion Background Theory, 422
9.3.1. Sampling Rate, 423
9.3.2. Encoding, 424
9.3.3. Quantizing and Resolution, 425
9.3.4. Data Rate, 426
9.4. Analog-to-Digital Converter Technologies, 427
9.4.1. Successive-Approximation Converters, 427
9.4.2. Integration-Based Converters, 430
9.4.3. Counter-Type Converters, 431
9.4.4. Parallel Converters, 432
9.5. The HC12 Analog-to-Digital (ATD) Conversion System, 434
9.5.1. HC12 ATD System, 435
9.5.2. HC12 ATD System Control Registers, 435
9.5.3. Programming the HC12 ATD System, 443
9.5.4. Programming the HC12 ATD System Using Interrupts, 446
9.6. S12 Analog-to-Digital (ATD) Conversion System, 446
9.6.1. Selectable 8- or 10-Bit Resolution, 446
9.6.2. Left/Right Justified and Signed/Unsigned Result Data, 447
9.6.3. External Trigger Control, 447
9.6.4. Flexible 1 to 8 Conversion Sequence Length Configuration, 447
9.6.5. Multiple ATD Channels, 449
9.6.6. S12 ATD Registers, 449
9.6.7. Programming the S12 ATD System, 452
9.7. HC12 Application, 452
9.8. Laboratory Application I, 455
9.9. Laboratory Application II, 459
9.10. Summary, 463
9.11. Further Reading, 464
9.12. Chapter Problems, 464
10. Microcontroller Communication Systems, 468
10.1. Need for Serial Communication Features, 469
10.2. Fundamentals of Serial Communication, 470
10.2.1. Serial Communication Terminology, 470
10.2.2. Serial Communication Signals, 473
10.3. Multiple Serial Interface, 474
10.4. The Serial Communications Interface, 475
10.4.1. Hardware Description—The SCI Transmitter, 477
10.4.2. Hardware Description—The SCI Receiver, 478
10.4.3. SCI Registers, 479
10.4.4. SCI Transmitter and Receiver Operation, 486
10.4.5. Programming the Serial Communication Interface, 487
10.5. SCI Application: Interface with a Global Positioning System, 489
10.6. HC12 and S12 SPI—Serial Peripheral Interface, 492
10.6.1. SPI Concepts, 492
10.6.2. SPI General Description, 495
10.6.3. HC12 SPI Registers, 498
10.6.4. S12 SPI Registers, 504
10.6.5. Programming the SPI, 505
10.6.6. SPI Applications, 508
10.7. Inter-IC Communication: The I2C Bus, 512
10.7.1. I2C Bus Configuration, 513
10.7.2. I2C Basic Protocol, 514
10.7.3. I2C Registers, 514
10.7.4. Key Activity Description, 518
10.7.5. I2C Related Interrupts, 520
10.7.6. Assembly Language Code Examples, 522
10.7.7. I2C Configured Devices, 525
10.8. Controller Area Networks, 525
10.8.1. Computer Networks, 525
10.8.2. Controller Area Network, 526
10.9. Laboratory Application, 532
10.10. Summary, 534
10.11. Further Reading, 534
10.12. Chapter Problems, 535
A. HC12/S12 Instruction Set, 537
B. 68HC812A4 Register Set, 559
C. MC9S12DP256 Register Set, 564
D. Number Systems and Number Arithmetic, 589
D.1. Number Representations, 589
D.2. Binary Number Arithmetic, 592
D.2.1. The 2’s Complement Number Representation, 592
D.2.2. Arithmetic, 596
D.3. Changing the Base of Numbers, 599
D.4. Summary and Further Readings, 603
E. Digital Logic Fundamentals, 605
E.1. Overview, 605
E.2. Basic Combinational Logic, 606
E.2.1. Medium-Scale Integration Combinational Circuits, 609
E.3. Sequential Logic Circuits, 610
E.3.1. Flip-Flops, 610
E.3.2. MSI Sequential Circuit Components, 611
E.4. Summary, 612
F. Mobile Robot and Related Products for the HC12/S12, 614
F.1. Building Your Own Mobile Robot, 615
F.2. HC12/S12-Related Hardware and Software Products, 619
F.2.1. Hardware, 619
F.2.2. Software, 621
Index, 626
Software License, L-1

Search Results

« Back to eTextbook


PAGE	Description

114	...